? 2002 fairchild semiconductor corporation ds500052 www.fairchildsemi.com august 1998 revised march 2002 74LCXR162245 low voltage 16-bit bidirectional transceiver with 5v tolerant inputs/outputs and 26 ? series resistors in the outputs 74LCXR162245 low voltage 16-bit bidirectional transceiver with 5v tolerant inputs/outputs and 26 ? series resistors in the outputs general description the lcxr162245 contains sixteen non-inverting bidirec- tional buffers with 3-state outputs and is intended for bus oriented applications. the device is designed for low volt- age (2.5v or 3.3v) v cc applications with capability of inter- facing to a 5v signal environment. the device is byte controlled. each byte has separate control inputs which could be shorted together for full 16-bit operation. the t/r inputs determine the direction of data flow through the device. the oe inputs disable both the a and b ports by placing them in a high impedance state. in addition, all a and b outputs include equivalent 26 ? (nominal) series resistors to reduce overshoot and under- shoot and are designed to sink/source up to 12 ma at v cc = 3.0v. the lcxr162245 is fabricated with an advanced cmos technology to achieve high speed operation while maintain- ing cmos low power dissipation. features 5v tolerant inputs and outputs 2.3v?3.6v v cc specifications provided a and b side outputs have equivalent 26 ? series resistors 5.3 ns t pd max (v cc = 3.3v), 20 a i cc max power down high impedance inputs and outputs supports live insertion/withdrawal (note 1) flow through pinout implements patented noise/emi reduction circuitry latch-up performance exceeds 500 ma esd performance: human body model > 2000v machine model > 200v note 1: to ensure the high-impedance state during power up or down oe should be tied to v cc through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. ordering code: devices also available in tape and reel. specify by appending the suffix letter ? x ? to the ordering code. logic symbol pin descriptions order number package number package description 74LCXR162245mea ms48a 48-lead small shrink outline package (ssop), jedec mo-118, 0.300" wide [rail] 74LCXR162245mex ms48a 48-lead small shrink outline package (ssop), jedec mo-118, 0.300" wide [tape and reel] 74LCXR162245mtd mtd48 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide [rail] 74LCXR162245mtx mtd48 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide [tape and reel] pin names description oe n output enable input t/r n transmit/receive input a 0 ? a 15 side a inputs or 3-state outputs b 0 ? b 15 side b inputs or 3-state outputs
www.fairchildsemi.com 2 74LCXR162245 connection diagram truth tables note 2: a and b port inputs are still active logic diagram inputs outputs oe 1 t/r 1 l l bus b 0 ? b 7 data to bus a 0 ? a 7 l h bus a 0 ? a 7 data to bus b 0 ? b 7 h x high z state on a 0 ? a 7 , b 0 ? b 7 (note 2) inputs outputs oe 2 t/r 2 l l bus b 8 ? b 15 data to bus a 8 ? a 15 l h bus a 8 ? a 15 data to bus b 8 ? b 15 h x high z state on a 8 ? a 15 , b 8 ? b 15 (note 2)
3 www.fairchildsemi.com 74LCXR162245 absolute maximum ratings (note 3) recommended operating conditions (note 5) note 3: the absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maxi mum ratings. the ? recom- mended operating conditions ? table will define the conditions for actual device operation. note 4: i o absolute maximum rating must be observed. note 5: unused pins (inputs or i/o's) must be held high or low. they may not float. dc electrical characteristics symbol parameter value conditions units v cc supply voltage ? 0.5 to + 7.0 v v i dc input voltage ? 0.5 to + 7.0 v v o dc output voltage ? 0.5 to + 7.0 output in 3-state v ? 0.5 to v cc + 0.5 output in high or low state (note 4) i ik dc input diode current ? 50 v i < gnd ma i ok dc output diode current ? 50 v o < gnd ma + 50 v o > v cc i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature ? 65 to + 150 c symbol parameter min max units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 0 5.5 v v o output voltage high or low state 0 v cc v 3-state 0 5.5 i oh /i ol output current v cc = 3.0v ? 3.6v 12 ma v cc = 2.7v ? 3.0v 8 v cc = 2.3v ? 2.7v 4 t a free-air operating temperature ? 40 85 c ? t/ ? v input edge rate, v in = 0.8v ? 2.0v, v cc = 3.0v 0 10 ns/v symbol parameter conditions v cc t a = ? 40 c to + 85 c units (v) min max v ih high level input voltage 2.3 ? 2.7 1.7 v 2.7 ? 3.6 2.0 v il low level input voltage 2.3 ? 2.7 0.7 v 2.7 ? 3.6 0.8 v oh high level output voltage i oh = ? 100 a 2.3 ? 3.6 v cc ? 0.2 v i oh = ? 4 ma 2.3 1.8 i oh = ? 4 ma 2.7 2.2 i oh = ? 6 ma 3.0 2.4 i oh = ? 8 ma 2.7 2.0 i oh = ? 12 ma 3.0 2.0 v ol low level output voltage i ol = 100 a 2.3 ? 3.6 0.2 v i ol = 4 ma 2.3 0.6 i ol = 4 ma 2.7 0.4 i ol = 6 ma 3.0 0.55 i ol = 8 ma 2.7 0.6 i ol = 12 ma 3.0 0.8 i i input leakage current 0 v i 5.5v 2.3 ? 3.6 5.0 a i oz 3-state i/o leakage 0 v o 5.5v 2.3 ? 3.6 5.0 a v i = v ih or v il
www.fairchildsemi.com 4 74LCXR162245 dc electrical characteristics (continued) note 6: outputs disabled or 3-state only. ac electrical characteristics note 7: skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). parameter guaranteed by design. dynamic switching characteristics capacitance symbol parameter conditions v cc t a = ? 40 c to + 85 c units (v) min max i off power-off leakage current v i or v o = 5.5v 0 10 a i cc quiescent supply current v i = v cc or gnd 2.3 ? 3.6 20 a 3.6v v i , v o 5.5v (note 6) 2.3 ? 3.6 20 ? i cc increase in i cc per input v ih = v cc ? 0.6v 2.3 ? 3.6 500 a symbol parameter t a = ? 40 c to + 85 c, r l = 500 ? units v cc = 3.3v 0.3v v cc = 2.7v v cc = 2.5v 0.2 c l = 50 pf c l = 50 pf c l = 30 pf min max min max min max t phl propagation delay 1.5 5.3 1.5 6.0 1.5 6.4 ns t plh a n to b n or b n to a n 1.5 5.3 1.5 6.0 1.5 6.4 t pzl output enable time 1.5 7.3 1.5 8.0 1.5 9.5 ns t pzh 1.5 7.3 1.5 8.0 1.5 9.5 t plz output disable time 1.5 6.4 1.5 6.9 1.5 7.7 ns t phz 1.5 6.4 1.5 6.9 1.5 7.7 t oshl output to output skew (note 7) 1.0 ns t oslh 1.0 symbol parameter conditions v cc t a = 25 c units (v) typical v olp quiet output dynamic peak v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 0.35 v c l = 30 pf, v ih = 2.5v, v il = 0v 2.5 0.25 v olv quiet output dynamic valley v ol c l = 50 pf, v ih = 3.3v, v il = 0v 3.3 ? 0.35 v c l = 30 pf, v ih = 2.5v, v il = 0v 2.5 ? 0.25 symbol parameter conditions typical units c in input capacitance v cc = open, v i = 0v or v cc 7 pf c i/o input/output capacitance v cc = 3.3v, v i = 0v or v cc 8 pf c pd power dissipation capacitance v cc = 3.3v, v i = 0v or v cc , f = 10 mhz 20 pf
5 www.fairchildsemi.com 74LCXR162245 ac loading and waveforms generic for lcx family figure 1. ac test circuit (c l includes probe and jig capacitance) waveform for inverting and non-inverting functions propagation delay. pulse width and t rec waveforms 3-state output low enable and disable times for logic 3-state output high enable and disable times for logic setup time, hold time and recovery time for logic t rise and t fall figure 2. waveforms (input characteristics; f =1mhz, t r = t f = 3ns) test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 0.3v v cc x 2 at v cc = 2.5 0.2v t pzh ,t phz gnd symbol v cc 3.3v 0.3v 2.7v 2.5v 0.2v v mi 1.5v 1.5v v cc /2 v mo 1.5v 1.5v v cc /2 v x v ol + 0.3v v ol + 0.3v v ol + 0.15v v y v oh ? 0.3v v oh ? 0.3v v oh ? 0.15v
www.fairchildsemi.com 6 74LCXR162245 schematic diagram generic for lcx family
7 www.fairchildsemi.com 74LCXR162245 physical dimensions inches (millimeters) unless otherwise noted 48-lead small shrink outline package (ssop), jedec mo-118, 0.300" wide package number ms48a
www.fairchildsemi.com 8 74LCXR162245 low voltage 16-bit bidirectional transceiver with 5v tolerant inputs/outputs and 26 ? series resistors in the outputs physical dimensions inches (millimeters) unless otherwise noted (continued) 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide package number mtd48 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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